Terms & Conditions

These Terms & Conditions govern the consultation, reproduction, and engineering implementation of technical specifications, hardware memory layouts, and cryptographic attestation structs published within the AMD-Secure Architecture Repository.

1. Technical Documentation Scope

All hardware specifications, register definitions, kernel parameters, and cryptographic structures are provided solely for hypervisor compatibility engineering, confidential computing enablement, and platform security verification.

2. Intellectual Property & Trademarks

AMD, EPYC, Ryzen, and Infinity Guard are registered marks of their respective brand holders. All other product names, logos, and brands referenced herein are trademarks or registered trademarks of their respective owners, cited strictly under nominative fair use for technical identification.

3. Disclaimer of Warranties

Technical materials and code structures are published "AS-IS" without warranty of any kind. Implementers are solely responsible for verifying hardware revision compatibility, microcode TCB patch levels, and silicon stepping errata prior to production hypervisor deployment.

4. Cryptographic Implementation Guidelines

Attestation protocol consumers must ensure that hardware public keys are retrieved exclusively through authenticated hardware root-of-trust channels (ASK/ARK certificate chain) before validating guest attestation reports.